PATENT COVER GRAPHIC


United States Patent 3,456,169
July 15, 1969

Integrated Circuits Using Heavily Doped Surface Region To Prevent Channels And Methods For Making
Thomas Klein

Filed June 20, 1966
Image of US PATENT 3,456,169

Abstract of the Disclosure

The invention describes an integrated circuit combining semiconductor circuit elements having active regions of the same or opposite type conductivity separated by a semiconductive region over which extends an interconnection on an insulating layer, wherein a highly doped surface region is provided underneath the interconnection to reduce unwanted field-induced leakage currents. In a preferred, the circuit elements are complementary IGFETs. In another embodiment, one of the IGFETs is built into an island surrounded by a thin heavily doped liner
Figure descriptions: cover graphic

  • Figure 1 is a cross-sectional view taken along the line I-I of Figure 2.
  • Figure 2 is a plan view.
  • Figures 1 and 2 show a completed device comprising a p-type body (1), epitaxially deposited n-type material (2), the extent of which is shown in Figure 2 by the chain-dot line (3), an n+ diffused layer (4), p-type diffused regions (5), n-type diffused regions (6) and an oxide layer (7).

 Citations [54]:
  
3,243,323 03/1966 Corrigan 3,340,598 09/1967 Hatcher 3,341,755 09/1967 Husher 3,356,858 12/1967 Wanlass
National Museum of American History
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