PATENT COVER GRAPHIC


United States Patent 3,457,125
July 22, 1969

Passivation Of Semiconductor Devices
Bruce M. Kerr

Filed June 21, 1966
Image of US PATENT 3,457,125

Abstract of the Disclosure

A process for passivating a semiconductor device having one surface partially covered with an oxide layer by forming a first passivating dopant material of one conductivity type covering the semiconductor body and the oxide layer, forming a second oxide layer covering the first passivating dopant material and forming a second passivating dopant material of the opposite conductivity type covering the second oxide layer
Figure descriptions: cover graphic

  • Figure 1 through 7 are schematic sectional views on an exaggerated scale of a transistor structure in various stages of fabrication according to the processes of this invention.
  • Figure 8 is a schematic plan view on an exaggerated scale of the transistor structure shown in Figures 1 through 7.
  • Figure 9 is a schematic sectional view of another transistor structure made according to the methods of this invention in an intermediate stage of fabrication, also at a greatly exaggerated scale.
  • Figure 10 is a schematic sectional view of the finished transistor structure of Figure 9.

 Citations [54]:
  
3,206,827 09/1965 Kriegsman 3,226,611 12/1965 Haenichen 3,275,910 09/1966 Phillips 3,350,222 10/1967 Ames
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