Abstract of the Disclosure

A novel thin film decoupling capacitor is incorporated in the unused side of an integrated circuit chip, one side of said capacitor comprising a metallic film, the second side of said capacitor comprising semiconductor columns of a first conductivity type embedded in a semiconductor substrate of a second conductivity type. The surface of said columns adjacent said metallic film are indented and fave a dielectric material contained in the indentations. The metallic plane is in contact with the dielectric material and also with portions of the bottom surface of the substrate adjacent said indentations. A low resistance contact to the columnar side of the capacitor is made by forming a semiconductor layer of the same conductivity type as said columns over the top of said substrate, forming a second semiconductor layer of the opposite conductivity type to said first layer over said first layer, and forming a conductive path of the same conductivity type as said first layer from the top of said second layer to said first layer. Thus, a low resistance contact is made from the top of said second layer, where the integrated circuits themselves will be located, to the columnar side of the capacitor. A novel process for making the described semiconductor body is included, comprising a series of diffusion steps including controlled out-diffusions of buried diffusions.

• Figure 1 is an isometric view shoing the thin film capacitor incroporated in the unused side of an integrated circuit chip.
• Figure 2 is an isometric broken view of the substrate or semiconductor wafer within which the columnar side of the capacitor will be formed.
• Figure 3 is a brokin isometric view of semiconductor substrate or wafer of Figure 2 showing the columns of a first conductivity type embedded therein.
• Figure 4 is the same as Figure 3 with the inclusion of buried diffusions used in the fabrication of said diffused semiconductor collars.

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