PATENT COVER GRAPHIC


United States Patent 3,486,950
December 30, 1969

Localized Control Of Carrier Lifetimes In P-N Junction Devices And Integrated Circuits
Israel A. Lesk

Filed April 26, 1967
Image of US PATENT 3,486,950

Abstract of the Disclosure

A process for locally controlling carrier lifetimes in semiconductor devices and integrated circuits by selectively gettering a metal impurity which is diffused into a semiconductor body in which the devices or circuits are constructed. A metal impurity gettering region is formed on the surface of the semiconductor body to getter the metal impurity in selected regions of the semiconductor body.
Figure descriptions: cover graphic

  • Figure 1 illustrates a typical impurity concentration (C) profile within an N type semiconductor body which has been selectively doped with phosphorus, and diffused with the metal impurity gold.
  • Figure 2 is a plan view of a semiconductor body in which a high speed NPN transistor and a PN storage diode have been constructed in accordance with the present invention.
  • Figure 3 is a cross-section view of Figure 2 taken along lines 3-3 of Figure 2.

 Citations [54]:
  
3,440,113 04/1969 Wooley 3,440,114 04/1969 Harper
National Museum of American History
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