PATENT COVER GRAPHIC


United States Patent 3,494,023
February 10, 1970

Method of Producing Semiconductor Integrated Circuits
Heinz Dorendorf

Filed April 21, 1966
Image of US PATENT 3,494,023

Abstract of the Disclosure

Method of producing semiconductor integrated circuits includes etching away regions of the semiconductor wafer so as to leave spaced apart electrically functionary semiconductor pieces that are to function as semiconductor devices and as interconnections in the ultimate circuit, and filling the space between the pieces with solidifying insulating material to mechanically interconnect the pieces. Prior to etching, the semiconductor wafer is cemented onto an acid-resistant carrier, and the etching and filling steps are performed while the wafer is mounted on the carrier. After solidification of the filled and insulated material the carrier is removed.
Figure descriptions: cover graphic

  • Figure 1 shows schematically and in section an integrated circuit in an intermediate stage of its production.
  • Figure 2 corresponds to Figure 1 except that it represents a subsequent stage of the process.
  • Figure 3 is a top view of part of a carrier plate with several attached circuits identical with the one shown in Figure 1 and represented at the same stage of the method as in Figure 1.
  • Figure 4 is another plan view corresponding to Figure 3 but in a still later stage of the manufacturing method.



 Citations [54]:
  
3,076,051 01/1963 Haba 3,158,788 11/1964 Last 3,271,625 09/1966 Caracciolo 3,307,239 03/1967 Lepselter et al.
National Museum of American History
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