Abstract of the Disclosure

Planar transistor formed in wafer having sequentially grown epitaxial layers with lower layer doped for desired resistivity of collector region and upper layer, which has base and emitter regions diffused therein, made substantially intrinsic to reduce carrier compensation in base region.

• Figure 1A shows a cross sectional view of a prior art epitaxial planar transistor.
• Figure 1B shows the distribution of impurity components in said transistor.
• Figure 1C shows the resultant impurity distribution in said transistor.
• Figure 2A shows in cross sectional form an improved epitaxial planar transistor according to the invention.
• Figure 2B shows the distribution of impurity components in said transistor.
• Figure 2C shows the resultant impurity distribution in said transistor.

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