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United States Patent 3,507,713
April 21, 1970

Monolithic Circuit Chip Containing Noncompatible Oxide-Isolated Regions
Bernard L. Kravitz

Filed July 13, 1966
Image of US PATENT 3,507,713

Abstract of the Disclosure

In general my invention contemplates the provision of an integrated circuit slice containing noncompatible regions in which a substrate having a surface carries respective regions of material of different conductivity types extending into said substrate from said surface and surrounded below said surface by oxide isolating films and to a method of making the same. Each region comprises a layer of relatively high resistivity material superposed on a lyaer of relatively low resistivity to provide an ideal structure for formation of both p-n-p and n-p-n structures in the same slice.
Figure descriptions: cover graphic

  • Figure 1 is a fragmentary sectional view of a silicon slice illustrating an initial step in the process of making my monolithic chip containing noncompatible oxide isolated regions.
  • Figure 2 is a fragmentary sectional view of the slice illustrated in Figure 1 at a further point in my process of making a monolithic chip containing noncompatible oxide-isolated retions.
  • Figure 3 is a fragmentary sectional view of the slice illistrated in Figure 2 after further operations have been performed thereon.
  • Figure 4 is a bottom plan view of the slice shown in Figure 3 taken along the line 4-4 of Figure 3.
  • Figure 9 is a fragmentary sectional view of the integrated circuit structures formed in my chip containing noncompatible oxide-isolated regions.

 Citations [54]:
  
3,290,753 12/1966 Chang 3,320,485 05/1967 Buie 3,383,760 05/1968 Shwartzman 3,393,349 07/1968 Huffman 3,401,450 09/1968 Godeyahn
National Museum of American History
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