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United States Patent 3,531,857
October 6, 1970

Method Of Manufacturing Substrate For Semiconductor Integrated Circuit
Selichi Iwamatsu

Filed July 26, 1967
Image of US PATENT 3,531,857

Abstract of the Disclosure

A method of manufacturing a substrate for a semiconductor integrated circuit, which includes the step of forming a plurality of monocrystalline silicon regions in a polycrystalline silicon substrate to define circuit elements, whereby the regions are electrically isolated from each other by means of an insulator such as SiO2. In this method, a silicon wafer having one main surface thereof covered with SiO2 is placed on a readily removable pedestal with the SiO2 disposed in contact with the pedestal, and grooves of grid-like pattern are formed in the other main surface of the silicon wafer opposite the one main surface thereof so that the wafer is divided on its SiO2 side into a plurality of sections. The, the entire exposed surface of the wafer is oxidized so as to be covered with a film of SiO2. Thereafter polycrystalline silicon adapted for serving as a substrate is deposited in sufficient thickness on the SiO2 film.
Figure descriptions: cover graphic

  • Figures 1 to 6 are schematic sectional views illustrating the steps of manufacturing a substrate for an integrated circuit according to an embodiment of this invention.

 Citations [54]:
  
2,984,897 05/1961 Godfrey 3,391,023 07/1968 Frescura 3,158,788 11/1964 Last 3,158,927 12/1964 Saunders 3,165,811 01/1965 Kleimack et al 3,290,753 12/1966 Chang
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