PATENT COVER GRAPHIC


United States Patent 3,534,237
October 13, 1970

Power Isolation Of Integrated Circuits
Constantine S. Ananiades

Filed January 21, 1969
Image of US PATENT 3,534,237

Abstract of the Disclosure

An integrated circuit chip having a P type substrate region and N, P and N+ type regions on the substrate forming a transistor driver for applying drive signals to a drive line. A further P type region, isolated from substrate, forms a resistor coupled between the P type region and the substrate. A further N+ type region is in the substrate and a conductor connects the further N+ type region to a source of negative potential. The further N+ type region forms a diode which isolates the drive line from the negative source of potential for predetermined excursions of potential on the drive line when the output of the negative source of potential raises to zero potential.
Figure descriptions: cover graphic

  • Figure 1 is a schematic diagram of a driver circuit and embodying the present invention.

 Citations [54]:
  
2,981,877 04/1961 Noyce 3,333,326 08/1967 Thomas et al
National Museum of American History
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