PATENT COVER GRAPHIC


United States Patent 3,877,054
April 15, 1975

Semiconductor Memory Apparatus With A Multilayer Insulator Contacting The Semiconductor
David McElroy Boulin
Dawon Kahng
Joseph Raymond Ligenza
William Joseph Sundburg


Filed November 8, 1973
Image of US PATENT 3,877,054

Abstract of the Disclosure

An SI1I2M (semiconductor-insulator1-insulator2-metal) memory structure is characterized by the presence of an impurity, such as tungsten, concentrated in a region including the interface ("I1I2") between the I1 and I2 layers. This metallic impurity provides a well-defined I1I2 interface region, including a potential minimum ("well"), such that the I1I2 interface can be filled with electronic charge carriers (electrons or holes) which have been transported from the semiconductor under the influence of electric fields applied across the structure. The presence versus absence of captured electronic charge carriers at the I1I2 interface can be used as a memory indicator.
Figure descriptions: cover graphic

  • a diagram, partly in cross section, of semiconductor apparatus according to a specific three-terminal device embodiment of the invention.

 Citations [54]:
  
3,500,142 03/1970 Kahng 3,604,988 09/1971 Kahng 3,649,884 03/1972 Haneta 3,805,130 04/1974 Yamazaki
National Museum of American History
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