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United States Patent 4,143,390
March 6, 1979

Semiconductor Device And A Logical Circuit Formed Of The Same
Hideo Noguchi

Filed December 12, 1977
Image of US PATENT 4,143,390

Abstract of the Disclosure

A plurality of N-type first regions are formed in matrix arrangement on a P-t ype semiconductor substrate, and a plurality of N-type second regions are respec tively formed on first portions of the P-type semiconductor substrate which are positioned between the N-type first regions along each of the rows of the matrix arrangement. Depletion-type MOS transistors are formed of the second regions each acting as a channel and the N-type first regions disposed on each side of the second regions and acting as a source and a drain, gate electrodes are respectively formed on the second regions and second portions of the P-type semiconductor substrate which are positioned between the second regions, along each of columns of the matrix arrangement of the N-type first regions, and enhancement-type MOS transistors are formed of the second portions of the substrate under the gate electrodes, each of which forms a channel and the second regions disposed on each side of these second portions, which act as a source and a drain. That is, the channel regions of the depletion-type MOS transistors function as the source or drain regions of the enhancement-type MOS transistors, the depletion-type MOS transistors and enhancement-type MOS transistors being integrally formed with common regions
Figure descriptions: cover graphic

  • Figure 1 is a perspective view of the semiconductor device according to an embodiment of this invention.
  • Figure 2 is an equivalent circuit diagram of the semiconductor device of Figure 1.

 Citations [54]:
  
3,744,036 07/1973 Frohman-Bentchkowsky 3,914,855 10/1975 Cheney 4,045,811 08/1977 Dingwall
National Museum of American History
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