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United States Patent 4,163,242
July 31, 1979

MOS Storage Integrated Circuit Using Individual FET Elements
Karl-Ulrich Stein

Filed May 16, 1977
Image of US PATENT 4,163,242

Abstract of the Disclosure

A MOS integrated circuit incorporating a plurality of storage cells is provided, with a field effect transistor and an individual capacitor for each cell. Electrical conductors make contact with the electrodes of the field effect transistors on two planes, with the conductors connected with the gates of the FET's being disposed in a first plane, and the conductors connected with another terminal of the FET's being disposed in a second plane
Figure descriptions: cover graphic

  • a plan view of a portion of a storage arrangement incorporating a plurality of circuits constructed in accordance with the present invention.

 Citations [54]:
  
3,533,089 10/1970 Wahlstrom 3,703,384 11/1972 DeSimone et al 3,706,891 12/1972 Donofrio
National Museum of American History
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