PATENT COVER GRAPHIC


United States Patent 4,169,270
September 25, 1979

Insulated-Gate Field-Effect Transistor with Self-Aligned Contact Hold to Source or Drain
James A. Hayes

Filed April 6, 1978
Image of US PATENT 4,169,270

Abstract of the Disclosure

An oxide dielectric layer is interposed between the polysilicon gate and the contact hole to the source or drain of an insulated-gate field-effect transistor to prevent electrical shorts between the gate and metal contact to the source or drain. The oxide dielectric layer enables the contact hole to be extremely close to the polysilicon gate without electrical shorts occurring therebetween, thereby eliminating the need for a minimum separation between the gate and contact hole.
Figure descriptions: cover graphic

  • a simplified cross-sectional view of one structure of the invention wherein a thin layer of silicon dioxide passivation material is located along an edge of the polysilicon gate adjacent to the contact hole.



 Citations [54]:
  
3,745,647 07/1973 Boleky 3,749,987 07/1973 Anantha
National Museum of American History
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