PATENT COVER GRAPHIC


United States Patent 4,198,649
April 15, 1980

Memory Cell Structure Utilizing Cinductive Buried Regions
Robert Berry

Filed July 3, 1978
Image of US PATENT 4,198,649

Abstract of the Disclosure

In an oxide isolated semiconductor structure having an epitaxial layer formed on a monocrystalline substrate, a buried, laterally extending PN isolation junction in said structure, and oxidized isolation regions extending through said epitaxial layer to said PN isolation junction, thereby to form a plurality of electrically isolated pockets of semiconductor material, a dopant is located in those regions of the semiconductor material directly adjacent the oxidized isolation regions to prevent unwanted current flow called "channeling." The region formed by this dopant is often referred to as the field predeposition region. Typically, to form the field predeposition region, a selected dopant is placed in the exposed surface regions of the epitaxial semiconductor material just prior to the formation of the oxidized isolation regions. The field predeposition and oxidation of the epitaxial semiconductor material also cause the formation of a conductive buried region from that portion of the field predeposition dopant in the epitaxial pockets directly adjacent the oxidized semiconductor material. If desired, a collector sink then may be formed in the epitaxial pocket without disrupting the function of the conductive buried region. The conductive buried region may be utilized to facilitate manufacture of smaller memory circuits than heretofore available, compact junction field effect transistors, and other integrated circuit structures.
Figure descriptions: cover graphic

  • a structure showing the conductive buried region of the process of this invention.

 Citations [54]:
  
3,386,865 06/1968 Doo 3,873,383 03/1975 Kooi 4,005,453 01/1977 Le Can 4,111,724 09/1978 Qgiue
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