PATENT COVER GRAPHIC


United States Patent 4,208,780
June 24, 1980

Last-Stage Programming Of Semiconductor Integrated Circuits Including Selective Removal Of Passivation Layer
Paul Richman

Filed August 3, 1978
Image of US PATENT 4,208,780

Abstract of the Disclosure

A process for selectively modifying the electrical characteristics of selected M OS devices in an integrated circuit, such as in programming a read-only memory, at or near the final stage of circuit fabrication, includes the formation of a photoresist layer over the passivation layer of a nearly completed structure. Relatively narrow openings are formed in the photoresist at those locations at which it is desired to modify the underlying MOS devices, and wider openings are formed over the locations of bonding pads. Ion implantation is carried out through the narrow openings in the photoresist layer--the photoresist acting as an implantation barrier --to modify the underlying MOS devices. An oblique angle ion milling procedure is carried out in which the walls of the photoresist layer shield the passivation layer exposed by the narrow openings in the photoresist layer so as to remove the exposed portion of the passivation layer only over the bonding pad locations. The photoresist layer is subsequently removed
Figure descriptions: cover graphic

  • a partial cross-sectional view illustrating one of the steps employed in a process according to the present invention.

 Citations [54]:
  
3,258,898 07/1966 Garibotti 3,747,203 07/1973 Shannon 3,775,191 11/1973 McQuhae 4,080,718 03/1978 Richman 4,086,694 05/1978 U
National Museum of American History
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