PATENT COVER GRAPHIC


United States Patent 4,208,781
June 24, 1980

Semiconductor Integrated Circuit With Implanted Resistor Element In Polycrystalline Silicon Layer
G. R. Mohan Rao
John S. Stanczak
Jih-Chang Lien
Shyam Bhatia


Filed June 15, 1978
Image of US PATENT 4,208,781

Abstract of the Disclosure

Resistor elements for MOS integrated circuits are made by an ion implant step compatible with a self-aligned N-channel silicon-gate process. The resistor elements are in a part of a polycrystalline silicon layer which is also used as a gate for an MOS transistor and as an interconnection overlying field oxide. Resistors of this type are ideally suited for load devices in static RAM cells
Figure descriptions: cover graphic

  • an elevation view in section of a semiconductor RAM cell using the resistors of the invention.

 Citations [54]:
  
3,570,114 03/1971 Bean 4,055,444 10/1977 Rao
National Museum of American History
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