Abstract of the Disclosure

A pair of MOS transistors are formed as an integrated semiconductor device, sharing a common source/drain region which is created by the edges of inverted regions beneath the gates of the transistors. These gates are first and second level polysilicon, with the second partly overlapping the first. On the opposite ends, the source and drain regions are formed by diffusion using the oxide under the first and second level poly as the diffusion mask

• an elevation view in section of a small portion of a semiconductor chip showing a pair of transistors made according to the invention.

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4,084,108  04/1978  Fujimoto
4,099,196  04/1978  Simko