PATENT COVER GRAPHIC


United States Patent 4,216,491
August 5, 1980

Semiconductor Integrated Circuit Isolated Through Dielectric Material
Takashi Matsuda
Kazuo Niwa
Yasusuke Sumitomo


Filed August 31, 1978
Image of US PATENT 4,216,491

Abstract of the Disclosure

A semiconductor integrated circuit which includes a plurality of island regions surrounded by a bottom dish-like dielectric layer formed on one side of a support body. A transistor element is formed in the island region, and the collector region of the transistor element is formed more adjacent to one surface of the island region than the other regions. The emitter and base electrodes of the transistor element are respectively led out from the bottom side of the island region to the surface of the support body using interior leads. The method for manufacturing the above-described device is also disclosed.
Figure descriptions: cover graphic

  • a sectional side view showing a semiconductor integrated circuit according to one embodiment of this invention.

 Citations [54]:
  
3,381,182 04/1968 Thornton 3,602,982 09/1971 Kooi 3,407,479 10/1968 Fordemwalt et al 3,689,357 09/1972 Jordan 3,475,664 10/1969 De Vries 3,874,918 04/1975 Nechtow et al 3,566,214 02/1971 Usuda 3,942,187 03/1976 Gelsing et al 3,567,508 03/1971 Cox 4,131,909 12/1978 Matsuda et al
National Museum of American History
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