PATENT COVER GRAPHIC


United States Patent 4,217,153
August 12, 1980

Method Of Manufacturing Semiconductor Device
Shinobu Fukunaga
Akihiko Yasuoka


Filed March 31, 1978
Image of US PATENT 4,217,153

Abstract of the Disclosure

In the manufacture of a field-effect transistor, a silicon nitride film (underlaid with a thin silicon oxide film) is selectively formed on those parts of a semiconductor substrate of a first conductivity type at which a gate region and source and drain electrodes are to be formed, the formation of the source and drain regions are carried out by employing the silicon nitride film as a mask, and thereafter, the silicon nitride film is removed and the contacts are selectively formed at the exposed parts.

Further, this invention extends to the manufacture of a C-MOS integrated circuit device which exploits the SOP (Selective oxidation process) technique employing an oxidation-proof film.

According to this invention, there are provided a novel method of manufacture which reduces the problem of disconnection of electrode interconnections, which promotes the fineness of a pattern based on self-alignment and which reduces the capacitance between source and drain electrodes thereby to achieve a hign-speed operation.
Figure descriptions: cover graphic

  • vertical sectional views of a C-MOS FET portion during the principal steps of one embodiment of this invention.

 Citations [54]:
  
3,436,282 04/1969 Shoda 3,477,886 11/1969 Ehlenberger 3,959,025 05/1976 Polinsky 4,002,501 01/1977 Tamura 4,013,484 03/1977 Boleky et al 4,023,195 05/1977 Richman 4,043,848 08/1977 Bazin
National Museum of American History
HomeSearchChip TalkChip FunPatentsPeoplePicturesCreditsCopyrightComments