| 1987.0487.100 | Texas Instruments Collection | Object |
| Memory Wafer - 1982 TI number: G00330 This slice is from an initial production lot of 64K DRAM's on 125 mm. slices processed in the TI Japan Miho MOS 1 Front End. Processing was completed for shipment on July 10, 1982. July,1982, was the first month of shipment of 125mm. slices from Miho MOS 1, and the conversion was completed in November, 1982. The five special chips on the slice are test chips to be available for slice evaluation purposes. Placing such chips on slices has been standard TI procedure. For information on the introduction of the 64K DRAM, see G00116. Related material in collection: G00116. |
| Texas Instruments (Mohan Rao, Shuji Uemura (TIJ).)
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