| 1987.0487.360 | Texas Instruments Collection | Object |
| Wafer Display - 1985 TI number: G00200 Display has a slice from the first lot of TI's experimental 1 Mbit CMOS DRAM. The slice was produced in April, 1985, in the new Front End at the Miho, Japan, plant. The display contains the 125 mm. silicon slice and an enlarged photo of the memory chip. One micron minimum feature size and state-of-the-art processing permitted the basic memory cell to be only about 4% of the area used on a DRAM of 1980. The slice has alternate rows of memory chips and test chips. In production, only a few test chips are spaced on the slice surface. |
| Texas Instruments (Greg Armstrong, Mohan Rao.)
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Wafer Display © Copyright 2000 Smithsonian Institution |
         
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