(parenthesis = ICE Project File Series 16 cross reference)

Bound Volumes 101-123 [118, 120 missing]
Bound Volumes 124-149 [138, 149 missing]
Basic Technology 7th Edition
Microcircuit Manufacturers Control Handbook 2nd Edition
Bound Volumes 150-161 [160 missing]


PE 101 (RADC 10215 A) Intel MD81212, MD8224, MD8228, MC8251 - 1977

PE 102 (10215 B) TI SBP9900

PE 103 (10215 C) Motorola MC6820,MC6850, MC6852, MC6860 - 1977

PE 104 (10215 D) AMD AM2909DM-B, AM2902DM-B

PE 105 (10215 E) Am 2915, Am2916, Am2917 - 1977

PE 106 [NONE]

PE 107 (10215 F) AMD AM 2918-DMB

PE 108 (10215 G) Motorola MC6840, MC6830, MC6854 - 1977

PE 109 (10215 A) Motorola MC6854, MC68A54 - 1077

PE 110 (10215 I) RADC Intel 8259

PE 111 (10215 J) Intel 82551

PE 113 (10215 L) AMD Am2901 DC

PE 114 (1039 A) Motorola MC6802

PE 115 (10379 B) Motorola MC6846BQCS

PE 116 (10379 C) Intel MD2147

PE 117 (10379 F) Intel 8085A 8-Bit Microprocessor - 1979

PE 118 (10379 G) Harris HD-15530

PE 119 (10379 D) RADC AMD Am2903, Am2910 - 1979

PE120 (10379 E) RADC AMD Am2903 - 1978 PDF  6.59MB
a randomly selected PE as an example of a typical evaluation
The Am2903 4-bit expandable microprocessor slice is made with SCHOTTKY bipolar technology with a process that uses washed emitters, ion implanted resistors and double-level metallization. The Am2903 contains 16 internal working registers that may be addressed from two different address buses. The register file may be expanded externally to any number of registers. The Am2903 has a complete arithmetic and logic set. In addition the Am2903 provides a special set of instructions which facilitate the implementation of multiplication, division, normalization and other previously time-consuming operations. The Am2903 is similar to the Am2901 except that the Am2901 cannot expand the internal 16 word register file without sacrificing the two-address architecture and shifting compatibility Also the Am2901 requires either additional external hardware or additional microinstruction or both to do the single cycle functions built into the Am2903.

PE 121 (10379 H) RADC AMD Am 9511 - 1978
The Advanced Micro devices Am9511 Arithmetic Processing Unit [APU] provides 16- or 32-bit fixed and 32-bit floating point arithmetic operations as well as floating point trigonometric and logarithmic operations. It is designed specifically as a single-function support device for microcomputer applications. The circuit architecture contains all the parts of a single-chip microcomputer including CPU, ROM, RAM and I/O. Because of its special purpose programming, the APU can only be used as an ancillary processor to the main CPU.

PE 122 (10379 J) RADC Motorola MC10800 - 1979
The MC10800 circuit is the 4-bit Arithmetic Logic Unit [ALU] slice for the MC10800 family of LSI processor circuits. Each circuit in this family is four bits wide but can be connected in parallel for any required data word length or control memory size. Other LSI circuits of this family include the MC108001 Microprogram Control Circuit, the MC10802 Timing Circuit, the MC10803 Memory Interface Circuit, the MC10804/5 Bidirectional translators with latch, the MC10806 Programmable Multi-bit Shifter. A system would also require MECL compatible PROMs and RAMs. The MC10800 circuit performs the necessary logic and arithmetic functions required to execute the various machine instructions. Its features include three input/output data ports; latch/mask logic; arithmetic logic unit; shift network; accumulator; and bus control logic. The logic levels of this circuit are compatible with the MECL 10,000 family.

PE 123 (10379 I) RADC Motorola MC 10801 - 1979
The MC10801 circuit performs the microprogram control function for the Motorola MC10800 family of LSI processor circuits. Each circuit in this family is four bits wide but can be connected in parallel for any required data word length or control memory size. Other LSI circuits of this family include the MC10800 ALU, the MC10802 Timing Circuit, and the MC10803 Memory Interface Circuit. A system would also require MECL compatible PROMs and RAMs. The MC10801 Microprogram Control function controls microprocessor operations by generating the addresses and sequencing the pattern for microprogram control storage. Its features include 16 microprogram sequencing instructions; a microprogram address register; repeat register; instruction register and status register accessible from external pins, an expandable four by four Push-Pop stack for nesting subroutines, branch inputs for conditional operations and address masking on special instructions. The logic levels of this circuit are compatible with the MECL 10,000 family. The analysis of this chip shows the process used was a double level metal process using washed emitters and SCHOTTKY diodes. The electrical evaluation revealed that all of the internal circuitry with the exception of the incrimenter was of a CML [Current Mode Logic] configuration operating between ground and -2 volts (VTT). The input, output and I/O buffers translated the voltage levels from the MECL levels to the CML levels. Positive logic is used in this report in the electrical evaluation section. Motorola expresses all truth tables in negative logic with VOL being a logic ONE and VOH a logic Zero. The MC10801 circuit analyzed is a commercial grade unit packaged in a ceramic hermetic package specified to operate over the temperature range -300C to +850C. No other temperature range or package options are available.

PE 124 (10379 L) RADC Zilog Z80-CPU - 1979
The Z80-Central Processing Unit [CPU] provides the processor and clock functions for a microcomputer system. There are eighteen 8-bit and four 16-bit registers that are accessible to the programmer. The device was designed as an enhancement to the 8080A CPU, and the Z80 instruction set all 8080A instructions as a subset. Built-in dynamic RAM refresh circuitry enables the CPU to be interfaced with standard speed dynamic or static memories with a minimum of external logic. The circuit requires a single five volt supply and a single phase five volt clock. The Z80-CPU is implemented using an N-channel silicon-gate depletion-load technology and is packaged in a 40-pin DIP.

PE 125 (10379 K) Zilog Z80-CTC - 1979 PDF 11MB
a randomly selected PE as an example of a typical evaluation
The Z80-Counter Timer Circuit [CTC] provides counting and timing functions for microcomputers based on the Z80-CPU. The four independent channels are programmable to operate as either a counter or a timer. This circuit requires a single 5 volt supply and a single phase 5 volt clock. The Z80-CTC utilizes N-channel silicon gate depletion-load MOS technology and is packaged in a 28-pin DIP. A priority interrupt structure that is dedicated to the Z80-CPU provides for automatic interrupt vectoring without external logic.

PE 126 (10379 M) RADC Zilog Z80-PIO - 1979
The Z80 Parallel I/O [PIO] circuit is a programmable two-port device which provides a TTL-compatible interface between peripherals and the Z80-CPU. The device utilizes N-channel, silicon gate, depletion-load technology and is packaged in a 40-pin DIP. The two independent 8-bit bidirectional peripheral interface ports also have handshake data transfer control. Four modes of operation may be selected; byte output, byte input, byte bidirectional and bit control modes. A single 5 volt supply and single phase clock are required. Data transfers between peripheral device and the CPU can be accomplished under interrupt control. The interrupt may be programmed to occur upon specific status conditions in the peripheral device. The priority interrupt logic, common to all Z80 peripherals, is included to provide for automatic interrupt vectoring. The port B outputs are specified to supply 1.5 mA at 1.5 volts to drive DARLINGTON transistors. The function of the Z80-PIO may be characterized as a replacement for INTEL 8255 PPI. However, no attempt is made to make the Z80-PIO an upward compatible replacement for the 8255 PPI.

PE 127 (10379 N) RADC Zilog Z80-DMA - 1979
The Z80 Direct Memory Access [DMA] circuit is a single-channel device which speeds the exchange of data between I/O and memory in a microcomputer system. The DMA permits direct data transfer, thus bypassing the microprocessor [MPU]. A DMA is needed when the MPU is overloaded by I/O activity as well as when speed of I/O transfer is important. Basically, the DMA directs the flow of data, by stepping a counter through consecutive memory addresses while reading and writing data. In addition, the Z80-DMA can monitor the data for programmed-bit pattern and stop upon finding a match.

PE 128 (10379 O) RADC Zilog Z80-SIO - 1979
The Zilog Z80-Serial Input/Output (SIO) is a dual-channel component that provides the serial data communications function in a microcomputer system. Its basic function is a serial-to-parrallel and parellel-to-serial converter. Each channel can be independently configured to operate in Asynchronous, Synchronous or SDLC/HDLC modes. The two channels can operate in different modes, but within a channel, transmit and receive logic must operate in the same mode. The device can generate and check Cyclic Redundancy Code [CRC] in the synchronous modes. The chip is also has modem control signals [RTS, CTS, DTR, DCD] in both channels A priority interrupt structure that is dedicated to the Z80-CPU provides for automatic interrupt vectoring without external logic. A single 5-volt supply and single phase 5-volt clock are required. The SIO utilizes N-channel, silicon-gate, depletion-load MOS technology and is packaged in a 40-pin DIP.

PE 129 (10379 P) RADC Harris HM1-6100 12-bit Microprocessor - 1979
The HM-6100 CMOS 12-bit Microprocessor is an almost exact reproduction of the PDP-8E Minicomputer. The PDP-8 was one of the first minicomputers and therefore is less than optimum by today's standards, but because of its popularity a huge library of PDP-8 software is available. The existence of the HM-6100 is justified by the popularity of the PDP-8 and the existence of the library of PDP-8 software. (The HM-6100 microprocessor should not be compared with other LSI microprocessors.) The HM-6100 microprocessor manufactured by Harris Semiconductor Products Division and is a second source and version on the IM6100 by the principal manufacturerer Intersil Inc. This report is based upon the HM-6100; however, an IM6100 was purchased and the die visually compared to that of the HM-6100. The circuits from the two manufactures used different mask sets and possibly a slightly different process. The layout and component placement was the same from the two vendors and the geometry and sizes of the transistors also appeared to be identical.

PE 130 (10379 Q) RADC Intel 8048/8035 - 1977
The INTEL 8048 and 8035L are part of the INTEL MCS-48 family. At ICE's request a letter was received from INTEL confirming that the 8035L is identical to the 8048 except that the ROM isn't used. The 8048/8035L have 64x8 words of on-chip RAM. The 8048 has a 1Kx8 ROM. If more ROM is needed the 8049 has a 2Kx8 ROM available. There are also versions with on-chip EPROMs. All microprocessors in the INTEL MCS-48 family share the same instruction set. The 8048/8035L uses a single 5 volt power supply and was fabricated using NMOS technology. A power-down mode on the 8048/8035L retains information stored in RAM while the microprocessor is without Vcc. The microprocessor clock is self -contaned except for an external frequency reference. There are 27 I/O) lines that can be software programmed as either input or output. An 8-bit binary counter feature aids the user in counting external events and generating time delays without burdening the microprocessor.

PE 131 (10379 R) RADC Fairchild 93481 4096 X 1-Bit Dynamic RAM - 1979
The 93481 circuit is a 4096 x 1 bipolar dynamic RAM manufactured by FAIRCHILD Semiconductor. The use of bipolar technology for a 4K dynamic RAM circuit is is unique to FAIRCHILD Semiconductor. Several developments were necessary to make construction of this circuit possible. Isoplanar technology was necessary to reduce the inter-electrode capacitances. Oxide isolation allows the collector to substrate capacitance, as well as the collector-base and emitter-base capacitances, to be reduced substantially. The design of a two-transistor cell and its associated refresh circuitry was the key circuit development. The cell includes merged NPN and PNP transistors in a cell occupying .79 square mills. The circuit has an access time of 100 ns (for the first part) a read/write cycle time of 200 ns, an active dissipation 400 mW and a stand-by dissipation of 50 mW. Currently available 4K dynamic MOS RAMs such as the 4027 and the 2104A have higher access times and lower dissipations. Higher radiation resistance is an advantage the 93481 bipolar RAM has over MOS RAMs. FAIRCHILD reports that typical 93481 devices fail at about 15,000 rads total dose, as compared to about 2,000 rads for typical 4096-bit MOS dynamic memories. FAIRCHILD predicts that this advantage in radiation hardness extends to the soft failures from alpha particle radiation. The 93481 RAM, as well as the MOS 4K dynamic RAMs are limited to operation from 0 to 700C. The 93481 circuit operates from a single 5 volt supply, whereas many of the dynamic MOS memories require three power supply voltages. The term Isoplanar Integrated Injection Logic (I3L) * on the FAIRCHILD data sheet is a misnomer for this part. No injection logic circuitry was found on this die. Injection logic is used on the FAIRCHILD 9440 microprocessor which uses the 93481 part. (The process used to manufacture the 93481 part is similar to that used to manufacture the 9440. ..."misleading..." G.Madland)

PE 132 (10379 S) RADC Fairchild 9440 16-Bit Microprocessor - 1979
The 9440 circuit is a 16-bit bipolar microprocessor manufactured by FAIRCHILD Semiconductor. The device is fabricated using FAIRCHILD's Isoplanar Integrated Injection Logic (I3L). The 9440 reproduces the logic of the Nova central Processing Unit although it is structurally different. The circuit employs 8 16-bit registers and transfers data via the 16-bit tri-state bidirectional data bus. The 9440 uses 50 instructions that utilize eight different addressing modes. The circuit requires a single +5 volt power supply and a current source of 350 mA. The 9440 can operate an on-chip oscillator or from an external clock.

PE 133 (10379 T) Intel 8086 16-Bit HMOS Microprocessor

PE 134 (10379 U) RADC Intel 8288 BUS Controller - 1978
The INTEL 8288 Bus Controller is designed to operate with the 8086 CPU. The Bus Controller provides the necessary command and timing control signals for the 8086 processing system. The 8288 also has bipolar drive capability. The 8288 was packaged in a 20-pin cerdip package and has an operating temperature of 00 to 700C. The 8288 requires a single +5 volt power supply.

PE 135 (10379 W) RADC Motorola MC 6845 CRT Controller

PE 136 (10379 V) RADC Fairchild 9442DC I/O BUS Controller - 1979
The FAIRCHILD 9442 is identified as an Input/Output Bus Controller. The 9442 provides the interface between the 9440 MICROFLAME microprocessor and the I/O bus. The 9442 decodes and stores I/O instructions until the information is needed. The 9442 can operate by the 9440 CPU clock or it can generate its own timing.
PE 137 (10379 X) RADC Motorola MC68488

PE 137 (10379 X) RADC Motorola MC68488 - 1979
The MOTOROLA MC68488 General-Purpose Interface Adapter (GPIA) is a byte-serial, bit-parallel digital interface between peripherals and computers. The MC68488 handles all handshake protocols needed by the IEEE-488 bus. The GPIA is NOT in itself a controller, but with external logic and software it can be set up to act as one. Direct memory access and user selection of device address are featured on this chip.

PE 138 [NONE]

PE 139/140 (10379 AA) RADC Zilog Z8002 and Z8001 - 1978
The arithmetic operation performs a complete operation every clock cycle including condition code results. This is accomplished by physically separating the two functions and operating in a time-over lapped mode. The CPU also contains the ability to refresh dynamic RAM, allowing for interfacing with slower speed memories with a minimum amount of external components. Multiple CPU systems encouraged by features such as large address memory management and a powerful instruction set. (second, though a unique chip, matching report PE 139 for confirmation of the series)

PE 141 [NONE]

PE 142 (10379 EE) RADC Motorola MC68000 16-bit Microprocessor - 1979
[proprietary device information, released 1994 from MOTOROLA] The MOTOROLA MC68000 is a single-chip, 16-bit microprocessor fabricated with N-channel, depletion-load, silicon-gate technology. An internal clock rate of 4 megahertz is accomplished by on-chip substrate bias generation and 3 micron design rules. The 68,000 square mil die contains approximately sixty-eight thousand transistors. Resources include eight 32-bit Data registers, seven 32-bit Address Registers, two independent 32-bit Stack Pointers, a 32-bit Program Counter and a 16-bit Status Register. The MC68000 CPU can directly address 224 bytes of memory in units of 1, 8 16, or 32 bits. The MC68000 easily interfaces with proven MC600 peripherals. Together with a powerful instruction set and large direct addressing capabilities, complex distributed Intelligence systems can be realized.

PE 143 (10379 DD) Texas Instruments TM2516 16K-PROM - 1979
The Texas Instruments TMS 2516 is a 2048 by 8 Ultraviolet Erasable, Programmable Read-Only Memory (UV EPROM). The device is fabricated using two-layer polysilicon, N-channel technology. A single +5 volt supply is needed for reading, and a +25 volts is required for programming. The TMS 2516 is erased by exposing the chip through the lid to high intensity ultraviolet light for about 30 minutes. All inputs and outputs are TTL compatible. The 174 by 146 mil die is packaged in an industry standard 24-pin package requiring a maximum 5 volt supply current of 100-milliamps in the active state and 25-milliamps in the stand-by mode.

PE 144 (10379 CC) RADC Intel D2118 - 1979
The INTEL 2119 16K x 1 dynamic RAM is one of the first 16K RAM's to use a single 5-volt supply. Fabricated in HMOS technology, the layout design was neatly done with device areas grouped together by function. The memory cells of this device use only a single transistor to help achieve high-speed and low-power dissipation.

PE 145 ½ (10891 A) RADC Zilog Z8 MCU - 1982
[prepared for RADC Contracting Division Griffiss Air Force Base] The ZILOG Z8 microprocessor utilizes N-channel, silicon-gate, depletion--load circuitry with 5-micron technology. No substrate bias generator is used on [the] chip. Pad numbers on this chip go in ascending order in a clockwise direction which is opposite to that found on most chips! This 64-pin development version offers the user prototype capabilities to develop code to be mask-programmed into on-chip ROM. Four additional control signals are added to accommodate external memory.

PE 145 2/2 (10379 -Y) Zilog Z8 - 1981

PE 146 ½ (10891 D) RADC Zilog Z8010 MMU - 1981

PE 146 2/2 (13891 D)Zilog Z8010 - 1981

PE 147 ½ (10891 E) RADC Zilog Z8036 CIO - 1982

PE 147 2/2 (13891 E) Zilog Z8036 - 1981

PE 148 ½ (10891 B) RADC Intel 8289 - 1982

PE 148 2/2 (13891 B) Intel 8085A

PE 149 (10891 F) RADC Motorola MC68120 IPC - 1982

PE 150 (10891 H) RADC AMI S3505

PE 151 ½ (10891 J) RADC Intel 2816 -1983

PE 151 2/2 (13891 J) Intel 8086 - 1982

PE 152 ½ (10891 I) RADC Intel 8087

PE 152 2/2 (13891 I) Intel 8087 - 1982

PE 153 ½ (10891 G) RADC XICOR X2210 - 1983

PE 153 2/2 (13891 G) XICOR X221

PE 154 (10891 K) RADC RCA MWS5114 - 1983

PE 155 (10891 C) RADC Intel 2920 - 1983

PE 156 (10891 L) RADC AMD Am2960

PE 157 (10891 M) RADC Intel 8089 - 183

PE 158 (10891 N) SG 1525A -1983

PE 159 (10891 Q) RADC Analog Devices AD41335 - 1983

PE 160 (10891 S) RADC Intel 2164 A

PE 161 (10891 R) RADC AMD Am29116 - 1983

PE 162 (10891 L) AMD Am2960

Others may be added - listing is not definitive.