United States Patent 3,461,003
August 12, 1969

Method of Fabricating A Semiconductor Structure With An Electrically Isolated Region Of Semiconductor Material
Don M. Jackson Jr.

Filed December 14, 1964
Image of US PATENT 3,461,003

Abstract of the Disclosure

This invention relates to a semiconductor structure and more particularly to an improved method of fabricating an electrically isolated region or island of semiconductor material in a common substrate suitable for the fabrication therein of a semiconductor device to be utilized in electrical circuits.
Figure descriptions: cover graphic

  • Figure 1 is a schematic block representation of a reactor and associated components, for producing an epitaxial growth on appropriate wafer.
  • Figures 2A, 2B, 2C and 2D are a series of sectional views, on an enlarged scale, showing successive process steps in the practice of the invention.

 Citations [54]:
3,243,323 03/1966 Corrigan 3,312,879 04/1967 Godejahn 3,320,485 05/1967 Buie
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