PATENT COVER GRAPHIC |
United States Patent 3,461,361 August 12, 1969 Complementary MOS Transistor Integrated Circuits With Inversion Layer Formed By Ionic Discharge Bombardment Peter Delivorias Filed February 24, 1966 |
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Abstract of the DisclosureA method of making a complementary pair of MOS transistors in a single semiconductor substrate body of one conductivity type silicon by first, forming a region of opposite conductivity type in the body, fabricating transistors having opposite type source and drain regions in the regions of different conductivity types each of these transistors having silicon dioxide gate electrode insulator layers, and, after formation of the silicon dioxide layers, cooling the unit to room temperature in pure, dry oxygen. An inversion layer is formed in the MOS transistor by bombarding the gate insulating layer with an ionic discharge, creating acceptor sites in the insulator. |
Figure descriptions: cover graphic |
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Citations [54]:3,356,858 12/1967 Waulass 3,323,947 06/1967 Kahng 2,750,341 06/1956 Ohl 3,328,210 06/1967 McCaldin 3,151,004 09/1964 Glicksman 3,329,601 07/1967 Mattox 3,246,173 04/1966 Silver 3,292,084 12/1966 McCaldin |
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