United States Patent 3,463,974
August 26, 1969

MOS Transistor And Method Of Manufacture
James W. Kelley
Charles T. Plough

Filed July 1, 1966
Image of US PATENT 3,463,974

Abstract of the Disclosure

A field effect transistor having a dielectric layer with two portions, the first portion under the gate overlying the channel region and having a surface charge density of less than about 5x10-11 charges per square centimeter, and a second portion over the remainder of the surface having a higher surface charge density in excess of about 1x10-12 charges per square centimeter.
Figure descriptions: cover graphic

  • Figure 1 is a greatly enlarged plain view of a MOS transistor according to the invention.
  • Figure 2 is a sectional view of the transistor structure according to the invention taken along line 2-2 of Figure 1.

 Citations [54]:
3,336,661 08/1967 Polansky 3,233,123 02/1966 Heiman 3,339,128 08/1967 Olmstead 3,246,173 04/1966 Silver
National Museum of American History
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