Abstract of the Disclosure

A process for fabricating a monolithic circuit having a matched pair of complementary transistors, a diffused resistor, and a diode. The starting material is a p-type substrate having heavily doped n-type diffused regions buried under an n-type epitaxial layer at each position where a transistor is to be formed. First a p-type diffusion is made to form the collector of the PNP transistor and an isolation ring around each burried n-type diffused region. The p-type diffusion is made to a depth sufficient to penetrate through the epitaxial layer to the p-type substrate to form isolation rings. However, where a PNP transistor is to be formed, the buried n-type region isolates the p-type collector region from the p-type substrate. Then a first n-type diffusion forms the base of the PNP transistor, and a second p-type diffusion forms the base of the NPN transistor, the resistors, and the anode of the diode. A third p-type diffusion forms the emitter of the PNP transistor, and finally a second n-type diffusion forms the emitter of the NPN transistor.

• Figure 1 is a schematic sectional view illustrating a monolithic circuit constructed in accordance with the present invention.
• Figures 2-6 are schematic sectional views similar to Figure 1 illustrating successive steps in the process for fabricating the monolithic circuit of Figure 1.

 Citations [54]:
  
3,327,182  06/1967  Kisinko
3,370,995  02/1968  Lowery