United States Patent 3,508,980
April 28, 1970

Method Of Fabricating An Integrated Circuit Structure With Dielectric Isolation
Don M. Jackson
Bernard W. Boland

Filed July 26, 1967
Image of US PATENT 3,508,980

Abstract of the Disclosure

An integrated circuit structure with dielectric isolation is made by a process which involves the bonding of a "handle wafer" to a protected epitaxial film grown on a low resistivity substrate of the same conductivity type. The back side of the substrate is then thinned to about one mil, preferably by chemical etching. Isolated semiconductor islands or mesas are formed by selectively etching through the remaining substrate and epitaxial layer, followed by impurity diffusion or metallization to form highly conductive channels for surface collector contacts. The islands are then isolated by the formation of an oxide film and a "back-fill" of polycrystalline silicon, high temperature glass, or other ceramic material. The handle wafer is removed whereby the epitaxial portions of the semiconductor islands are exposed and prepared for device fabrication by light mechanical polishing to remove any surface damage.
Figure descriptions: cover graphic

  • Figures 1-8 are enlarged cross-sectional views illustrating a sequence of steps used in the fabrication of a semiconductor structure in accordance with the method of the invention.

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National Museum of American History
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