PATENT COVER GRAPHIC |
United States Patent 4,144,099 March 13, 1979 High Performance Silicon Wafer And Fabrication Process Harold D. Edmonds Gary Markovits Filed October 31, 1977 |
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Abstract of the DisclosureGettered semiconductor wafers for integrated circuit device manufacture are prepared by grinding a layer of damage into the back face of the wafer to a depth of about 8-35 microns, heating the wafer to a temperature of about 800 degrees to 1150 degrees Celsius for about 1 to 3 hours and quickly cooling the wafer to a temperature below about 600 degrees Celsius, and polishing both sides of the wafer to form a polished, substantially damage-free front face and a smooth back face which has a residual layer of crystallographic damage to provide additional gettering during device manufacture |
Figure descriptions: cover graphic |
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Citations [54]:3,579,815 05/1971 Gentry 3,923,567 12/1975 Lawrence 3,701,696 10/1972 Mets 3,929,529 12/1975 Poponiak 3,723,053 03/1973 Myers et al 3,997,368 12/1976 Petroff et al 3,856,472 12/1974 Schweitzer et al 4,018,626 04/1977 Schwuttle et al 3,874,936 04/1975 d'Hervilly et al 4,042,419 08/1977 Heinke 3,905,162 09/1975 Lawrence 4,069,068 06/1978 Beyer et al |
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