PATENT COVER GRAPHIC |
United States Patent 4,149,176 April 10, 1979 Complementary MOSFET Device Kazuo Satou Mitsuhiko Ueno Filed November 16, 1977 |
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Abstract of the DisclosureA CMOS device comprising an N type semiconductor substrate, a P type well layer diffused in the substrate, a p-channel MOS transistor formed in the N type semiconductor substrate an n-channel MOS transistor formed in the P type well layer. A distance from an edge of a contact hole formed in the surface of a contact region of the p-channel MOS transistor to the P well layer is so chosen to suppress an operation of a parasitic bipolar transistor whose base is formed of the substrate |
Figure descriptions: cover graphic |
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Citations [54]:3,934,159 01/1976 Nomiya et al 3,955,210 05/1976 Bhatia |
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