Abstract of the Disclosure

A CMOS device comprising an N type semiconductor substrate, a P type well region diffused in the substrate, an n-channel MOS transistor formed in the P type well region, and a p-channel MOS transistor formed in the N type semiconductor substrate, and a method for manufacturing the CMOS device. In case the CMOS device serves as a CMOS inverter, the source region of the p-channel MOS transistor, the semiconductor substrate and the well layer constitute a parasitic PNP type bipolar transistor, and the source region of the n-channel MOS transistor, the well layer and the semiconductor substrate constitute a parasitic NPN type bipolar transistor. The product of the current amplification factor β₁ of the PNP type bipolar transistor and the current amplification factor β₂ of the NPN type bipolar transistor is smaller than 1.

• a cross-sectional side view of one embodiment of the semiconductor device according to the invention, with a gold layer laid on the back of the substrate.

 Citations [54]:
  
3,934,159  01/1976  Nomiya et al.
3,955,210  05/1976  Bhatia et al.