United States Patent 4,200,969
May 6, 1980

Semiconductor Device with Multi-Layered Metalizations
Masaharu Aoyama
Shunichi Hiraki
Toshio Yonezawa

Filed September 9, 1977
Image of US PATENT 4,200,969

Abstract of the Disclosure

There are provided a semiconductor device having alternately layered insulating and conductive layers on the major surface of a semiconductor body and the process for manufacturing the semiconductor device. In the manufacturing process, the conductive layers other than the conductive layer finally formed are each formed to be a laminate including at least two metal layers of which the etching rates are different. The photo-engraving process follows this step. In the lamina, the metal layer closer to the semiconductor body has a lower etching rate than that of the metal layer formed thereover. In the semiconductor device, the conductive layer other than that disposed furthest away from the semiconductor body has its side wall diverged to widen toward the semiconductor body.
Figure descriptions: cover graphic

  • an enlarged cross sectional view of a semiconductr device with multi-layered metalizations according to the present invention.

 Citations [54]:
3,586,922 06/1971 Johnson 3,607,480 9/1971 Harrap 3,900,944 08/1975 Fuller
National Museum of American History
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