PATENT COVER GRAPHIC |
United States Patent 4,214,120 July 22, 1980 Electronic Device Package Having Solder Leads And Methods Of Assembling The Package William T. Jones, Jr. Edward J. Moulis Filed October 27, 1978 |
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Abstract of the DisclosureAn electronic circuit package (11) includes a substrate (14) with leads (21) extending from at least one edge thereof. The leads (21) have a split end (26) formed by two slits (31,51). The slits divide the end into a lead stub (29) and a flag end (28). The flag end (28) is formed up in a step of approximately the thickness of the substrate (14). The forming of the flag end (28) foreshortens a flag support (32) to locate a flag (34) in substantial superposition to the lead stub (29). Both the lead stub and the flag (34) are solder bonded to respective bond pads (18) on the upper and lower major surfaces of the substrate (14) |
Figure descriptions: cover graphic |
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Citations [54]:1,232,584 07/1917 McMunn 2,655,705 10/1953 Hatfield 3,650,232 03/1972 Heinlen 3,689,684 09/1972 Cox et al 3,691,629 09/1972 Schierz 3,735,017 05/1973 Manning 3,736,367 05/1973 Heinlein et al 3,824,679 07/1974 Mosch et al 3,839,782 10/1974 Lincoln 3,868,725 02/1975 DeGraff 4,032,706 06/1977 Paletto 4,054,238 10/1977 Lloyd et al 4,059,810 11/1977 Paletto |
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