Abstract of the Disclosure

In the manufacture of a field-effect transistor, a silicon nitride film (underlaid with a thin silicon oxide film) is selectively formed on those parts of a semiconductor substrate of a first conductivity type at which a gate region and source and drain electrodes are to be formed, the formation of the source and drain regions are carried out by employing the silicon nitride film as a mask, and thereafter, the silicon nitride film is removed and the contacts are selectively formed at the exposed parts.

Further, this invention extends to the manufacture of a C-MOS integrated circuit device which exploits the SOP (Selective oxidation process) technique employing an oxidation-proof film.

According to this invention, there are provided a novel method of manufacture which reduces the problem of disconnection of electrode interconnections, which promotes the fineness of a pattern based on self-alignment and which reduces the capacitance between source and drain electrodes thereby to achieve a hign-speed operation.

• vertical sectional views of a C-MOS FET portion during the principal steps of one embodiment of this invention.

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